*Positive Edge Triggered JK Flip Flop 4-bit BCD UP Counter with Active HIGH Preset and Clear

Waiting for data

Signal	Value
Signal	Value

Cursor 1	Cursor 2	∆X	1/∆X	∆Y	∆Y (Phase)

ID:

x10

x0.1

Sheet:1

Analysis and annotation

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LM2904

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AD8561A

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AD620A

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AD584J

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S1G

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BZB84-B6V2

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MMBZ5240BL

NZH11C

SZ1SMA5913B

Diode bridges...

3N247

DF1510S

G3SBA60

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1.5KE100CA

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1SMB170A

Photodiodes...

BPW 34 FA

S1227-16BQ

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BC807

BD244

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MMBT2907AL

MMBTA63L

TIP32A

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2N7000

2N7002

5LN01SP

BSC100N06LS3 G

BSC123N08NS3 G

BSS138BK

BSZ123N08NS3 G

EPC2014

IRF510

IRF540

IRLML0060

PMPB20EN

PMOS...

BSP250

BSS84P

CPH3362

IPD042P03L3 G

NTR4101P

JFET...

MMBF4393L

MMBFJ175L

MMBFJ309L

IGBT...

AUIRGDC0250

IRG4BC30UD

IRG4PH50U

IRG4PSC71KD

NGTB15N60S1EG

UJT...

2N6027

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Synchronous Permanent Magnet

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Sensors...

Incremental Encoder

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Mechanical loads...

Inertial Load

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rad/s to RPM

rad to deg

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Power

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Phase Angle Controller

Phase Angle Controller (2 Pulse)

Phase Angle Controller (6 Pulse)

PWM

PWM Complementary

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PWM Sinusoidal 3 Phase

Linear regulators...

LM1084-3.3

LM1084-5.0

LM1084-ADJ

LM317

LM7805

MAX15007A

Switching regulators...

MC34063A

MOSFET drivers...

IR2010

IR2110

MAX15024B

TC4427

Digital

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AND

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4-Input AND

5-Input AND

6-Input AND

7-Input AND

8-Input AND

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NAND

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4-Input NAND

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6-Input NAND

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8-Input NAND

NOR

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XOR

2-Input XOR

3-Input XOR

4-Input XOR

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6-Input XOR

7-Input XOR

8-Input XOR

XNOR

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6-Input XNOR

7-Input XNOR

8-Input XNOR

Buffer

Inverter

Flip-Flops & Latches

D Flip-Flop

JK Flip-Flop

SR Flip-Flop

T Flip-Flop

D Latch

SR Latch

BCD to 7-Segment Decoders

74LS47N

74LS48N

Binary Counters

74LS93N

74LS193N

Mux/Demux

74LS139D

Adders

74LS183D

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Details

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Circuit Details

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Name

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Description

Provides context to the design, and an explanation of the circuit operation. This is useful for highlighting theory or critical aspects of the design.

digital

counter

4-bit

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SPICE

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Item

Document

Section

Only one section is available for multisection components.

Type

Rise time

Time it takes for signal to transition from low to high.

With non-zero rise time, the signal converts to an analog signal from a digital signal.

Fall time

Time it takes for signal to transition from high to low.

With non-zero fall time, the signal converts to an analog signal from a digital signal.

Use document settings

Use logic levels settings from Document tab.

Threshold voltage levels.

Threshold voltage values used in the logic evaluation. See Digital Simulation for more information.

Output low

Output low voltage.

Maximum output voltage level to produce a low signal.

Input low threshold

Input low threshold voltage.

Maximum input voltage level for the signal to be considered low.

Input high threshold

Input high threshold voltage.

Minimum input voltage level for the signal to be considered high.

Output high

Output high voltage.

Minimum output voltage level to produce a high signal.

Type Probe

Select desired function.

Function

Use document settings

Use logic levels settings from Document tab.

Threshold voltage levels.

Threshold voltage values used in the logic evaluation. See Digital Simulation for more information.

Output low

Output low voltage.

Maximum output voltage level to produce a low signal.

Input low threshold

Input low threshold voltage.

Maximum input voltage level for the signal to be considered low.

Input high threshold

Input high threshold voltage.

Minimum input voltage level for the signal to be considered high.

Output high

Output high voltage.

Minimum output voltage level to produce a high signal.

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Source

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Instantaneous

Displays instantaneous measurements on probe during interactive simulation.

Periodic

Displays periodic measurements on probe during Interactive simulation.

Bias point(s)

Displays bias points on probe for DC Op simulation.

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Name Positive Edge Triggered JK Flip Flop 4-bit BCD UP Counter with Active HIGH Preset and Clear

Type Schematic

The simulation to run. See Simulation types for more information.

Name

Title of graph. Edit as desired.

End time

Time at which the simulation stops. Does not include pauses. Simulation does not occur in real time.

Start simulation

RELTOL

Relative error tolerance. A simulation wide accuracy control used to establish convergence.

VNTOL

Absolute voltage error tolerance. Defines the minimum value for voltage where it may still be considered accurate.

ABSTOL

Absolute current error tolerance. Defines the minimum value for current where it may still be considered accurate.

ITL1

DC iteration limit. Number of iterative passes done on DC circuit equations in attempt to reach convergence in simulation.

ITL4

Upper iteration limit. Number of iterative passes done per time point, on Transient circuit equations in attempt to reach convergence in simulation.

Integration method. The numerical integration method used in transient analysis.

Temp

℃

Operating temperature. The temperature at which the entire circuit will be simulated.

Insert shunt resistance

Inserts a resistance of RSHUNT from every analog node to ground. Will aid in convergence, but alter the behavior of the circuit.

RSHUNT

Shunt resistance. This eliminates singular matrix errors that result from a lack of a DC path to ground.

Reset to default

Threshold voltage levels.

Threshold voltage values used in the logic evaluation. See Digital Simulation for more information.

Output low

Output low voltage.

Maximum output voltage level to produce a low signal.

Input low threshold

Input low threshold voltage.

Maximum input voltage level for the signal to be considered low.

Input high threshold

Input high threshold voltage.

Minimum input voltage level for the signal to be considered high.

Output high

Output high voltage.

Minimum output voltage level to produce a high signal.

Width

Sheet width in grid squares.

Height

Sheet height in grid squares.

Grid

Toggles grid display.

Net Labels

Toggles all net labels.

Component Labels

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Positive Edge Triggered JK Flip Flop 4-bit BCD UP Counter with Active HIGH Preset and Clear