*RR MAHASTRA GUSTI AYU FANISYAH_cycloconverter 3 phase_UNEJ

Waiting for data

Signal	Value
Signal	Value

Cursor 1	Cursor 2	∆X	1/∆X	∆Y	∆Y (Phase)

Out of date
V	—
V	—
V_PP	—
V_RMS	—
V_AV	—
f_V	—
I	—
I	—
I_PP	—
I_RMS	—
I_AV	—
f_I	—
D	—

Out of date
V	—
V	—
V_PP	—
V_RMS	—
V_AV	—
f_V	—
I	—
I	—
I_PP	—
I_RMS	—
I_AV	—
f_I	—
D	—

Out of date
V	—
V	—
V_PP	—
V_RMS	—
V_AV	—
f_V	—
I	—
I	—
I_PP	—
I_RMS	—
I_AV	—
f_I	—
D	—

Out of date
V	—
V	—
V_PP	—
V_RMS	—
V_AV	—
f_V	—
I	—
I	—
I_PP	—
I_RMS	—
I_AV	—
f_I	—
D	—

ID:

x10

x0.1

Sheet:1

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SPICE

SPICE Netlist

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** RR MAHASTRA GUSTI AYU FANISYAH_cycloconverter 3 phase_UNEJ_BAMBANG SUJANARKO **
*
* Multisim Live SPICE netlist
*
*

* --- Circuit Topology ---

* Component: D1
xD1 1 12 9 MCR08MT1/ON_D1

* Component: D10
xD10 3 12 6 MCR08MT1/ON_D10

* Component: D11
xD11 4 12 3 MCR08MT1/ON_D11

* Component: D12
xD12 6 12 3 MCR08MT1/ON_D12

* Component: D13
xD13 6 12 5 MCR08MT1/ON_D13

* Component: D14
xD14 4 12 5 MCR08MT1/ON_D14

* Component: D15
xD15 9 12 5 MCR08MT1/ON_D15

* Component: D16
xD16 5 12 9 MCR08MT1/ON_D16

* Component: D17
xD17 5 12 6 MCR08MT1/ON_D17

* Component: D18
xD18 5 12 4 MCR08MT1/ON_D18

* Component: D2
xD2 1 12 6 MCR08MT1/ON_D2

* Component: D3
xD3 9 12 1 MCR08MT1/ON_D3

* Component: D4
xD4 6 12 1 MCR08MT1/ON_D4

* Component: D5
xD5 4 12 1 MCR08MT1/ON_D5

* Component: D6
xD6 9 12 3 MCR08MT1/ON_D6

* Component: D7
xD7 1 12 4 MCR08MT1/ON_D7

* Component: D8
xD8 3 12 9 MCR08MT1/ON_D8

* Component: D9
xD9 3 12 4 MCR08MT1/ON_D9

* Component: R1
rR1 1 2 10000 VIRTUAL_RESISTANCE_R1

* Component: R2
rR2 2 5 10000 VIRTUAL_RESISTANCE_R2

* Component: R3
rR3 3 2 10000 VIRTUAL_RESISTANCE_R3

* Component: V1
vV1 9 0 dc 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 0 1 1000 0 0 0 )

* Component: V2
vV2 6 0 dc 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 0 1 1000 0 0 0 )

* Component: V3
vV3 12 0
+ pulse( 0 5 0 1e-9 1e-9
+ { 50 * 0.01 / 1000 }
+ { 1/1000 } )

* Component: V4
vV4 4 0 dc 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 0 1 1000 0 0 0 )

* --- Circuit Models ---

* R1 model
.model VIRTUAL_RESISTANCE_R1 r( )

* R2 model
.model VIRTUAL_RESISTANCE_R2 r( )

* R3 model
.model VIRTUAL_RESISTANCE_R3 r( )

* --- Subcircuits ---

* D1 subcircuit
*$
.subckt MCR08MT1/ON_D1 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D10 subcircuit
*$
.subckt MCR08MT1/ON_D10 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D11 subcircuit
*$
.subckt MCR08MT1/ON_D11 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D12 subcircuit
*$
.subckt MCR08MT1/ON_D12 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D13 subcircuit
*$
.subckt MCR08MT1/ON_D13 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D14 subcircuit
*$
.subckt MCR08MT1/ON_D14 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D15 subcircuit
*$
.subckt MCR08MT1/ON_D15 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D16 subcircuit
*$
.subckt MCR08MT1/ON_D16 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D17 subcircuit
*$
.subckt MCR08MT1/ON_D17 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D18 subcircuit
*$
.subckt MCR08MT1/ON_D18 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D2 subcircuit
*$
.subckt MCR08MT1/ON_D2 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D3 subcircuit
*$
.subckt MCR08MT1/ON_D3 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D4 subcircuit
*$
.subckt MCR08MT1/ON_D4 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D5 subcircuit
*$
.subckt MCR08MT1/ON_D5 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D6 subcircuit
*$
.subckt MCR08MT1/ON_D6 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D7 subcircuit
*$
.subckt MCR08MT1/ON_D7 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D8 subcircuit
*$
.subckt MCR08MT1/ON_D8 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

* D9 subcircuit
*$
.subckt MCR08MT1/ON_D9 anode gate cathode PARAMS:
**************************************
* Model Generated by EVAL LAB *
* July 23, 2003 *
* Copyright(c) On Semiconductor *
* All Rights Reserved *
*Commercial Use or Resale Restricted *
**************************************
*SCR
*MODEL FORMAT: PSpice
+ Vdrm=600v Vrrm=600v Idrm=10u
+ Ih=2.5ma dVdt=10e6
* Vgt must be greater than 0.65v
+ Igt=6.5ua Vgt=0.66v
+ Vtm=1.4v Itm=1.0
+ Ton=2u Toff=15u

* Where:
* Vdrm => Forward breakover voltage
* Vrrm => Reverse breakdown voltage
* Idrm => Peak blocking current
* Ih => Holding current
* dVdt => Critical value for dV/dt triggering
* Igt => Gate trigger current
* Vgt => Gate trigger voltage
* Vtm => On-state voltage
* Itm => On-state current
* Ton => Turn-on time
* Toff => Turn-off time

* Main conduction path
Scr anode anode0 control 0 Vswitch ; controlled switch
Dak1 anode0 anode2 Dakfwd OFF ; SCR is initially off
Dka cathode anode0 Dkarev OFF
VIak anode2 cathode ; current sensor

* dVdt Turn-on
Emon dvdt0 0 TABLE {v(anode,cathode)} (0 0) (2000 2000)
CdVdt dvdt0 dvdt1 100pfd ; displacement current
Rdlay dvdt1 dvdt2 1k
VdVdt dvdt2 cathode DC 0.0
EdVdt condvdt 0 TABLE {i(vdVdt)-100p*dVdt} (0 0 ) (.1m 10)
RdVdt condvdt 0 1meg

* Gate
Rseries gate gate1 {(Vgt-0.65)/Igt}
Rshunt gate1 gate2 {0.65/Igt}
Dgkf gate1 gate2 Dgk
VIgf gate2 cathode ; current sensor

* Gate Turn-on
Egate1 gate4 0 TABLE {i(Vigf)-0.95*Igt} (0 0) (1m 10)
Rgate1 gate4 0 1meg
Egon1 congate 0 TABLE {v(gate4)*v(anode,cathode)} (0 0) (10 10)
Rgon1 congate 0 1meg

* Main Turn-on
EItot Itot 0 TABLE {i(VIak)+5E-5*i(VIgf)/Igt} (0 0) (2000 2000)
RItot Itot 0 1meg
Eprod prod 0 TABLE {v(anode,cathode)*v(Itot)} (0 0) (1 1)
Rprod prod 0 1meg
Elin conmain 0 TABLE
+ {10*(v(prod) - (Vtm*Ih))/(Vtm*Ih)} (0 0) (2 10)
Rlin conmain 0 1meg

* Turn-on/Turn-off control
Eonoff contot 0 TABLE
+ {v(congate)+v(conmain)+v(condvdt)} (0 0) (10 10)

* Turn-on/Turn-off delays
Rton contot dlay1 825
Dton dlay1 control Delay
Rtoff contot dlay2 {290*Toff/Ton}
Dtoff control dlay2 Delay
Cton control 0 {Ton/454}

* Reverse breakdown
Dbreak anode break1 Dbreak
Dbreak2 cathode break1 Dseries

* Controlled switch model
.MODEL Vswitch vswitch
+ (Ron = {(Vtm-0.7)/Itm}, Roff = {Vdrm*Vdrm/(Vtm*Ih)},
+ Von = 5.0, Voff = 1.5)

* Diodes
.MODEL Dgk D (Is=1E-16 Cjo=50pf Rs=5)
.MODEL Dseries D (Is=1E-14)
.MODEL Delay D (Is=1E-12 Cjo=5pf Rs=0.01)
.MODEL Dkarev D (Is=1E-10 Cjo=5pf Rs=0.01)
.MODEL Dakfwd D (Is=4E-11 Cjo=5pf)
.MODEL Dbreak D (Ibv=1E-7 Bv={1.1*Vrrm} Cjo=5pf Rs=0.5)

* Allow the gate to float if required
Rfloat gate cathode 1e10

.ENDS

Errors and Warnings

Any error, warning or information messages appear below.