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127Vrms60HzV1V2127Vrms60Hz-120°V3127Vrms60Hz120°11.5ΩR1R211.5ΩR311.5Ω0.2μHL1L20.2μHL30.2μH12345670PR1 +REF1 -REF1PR2 +REF2 -REF2PR5PR6PR7PR3REF33μFC13μFC2C33μF910PR4 V V V V V A A A V A
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ID:

ID:

x10
x0.1
Sheet:1
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Details
Netlist
Errors
SPICE
SPICE Netlist

This is a text-based representation of the circuit.
The * symbol indicates a comment.
The + symbol indicates a continuation from the previous line.
Probes do not appear in netlists.

** Circuito Trifásico **
*
* Multisim Live SPICE netlist
*
*

* --- Circuit Topology ---

* Component: C1
cC1 7 0 0.000003

* Component: C2
cC2 9 0 0.000003

* Component: C3
cC3 10 0 0.000003

* Component: L1
lL1 1 2 2e-7

* Component: L2
lL2 3 5 2e-7

* Component: L3
lL3 4 6 2e-7

* Component: R1
rR1 2 7 11.5 VIRTUAL_RESISTANCE_R1

* Component: R2
rR2 5 9 11.5 VIRTUAL_RESISTANCE_R2

* Component: R3
rR3 6 10 11.5 VIRTUAL_RESISTANCE_R3

* Component: V1
vV1 1 0 dc 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 0 {127*1.414213562} 60 0 0 0 )

* Component: V2
vV2 3 0 dc 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 0 {127*1.414213562} 60 0 0 -120 )

* Component: V3
vV3 4 0 dc 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 0 {127*1.414213562} 60 0 0 120 )


* --- Circuit Models ---

* R1 model
.model VIRTUAL_RESISTANCE_R1 r( )

* R2 model
.model VIRTUAL_RESISTANCE_R2 r( )

* R3 model
.model VIRTUAL_RESISTANCE_R3 r( )

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Circuito Trifásico
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End time

s

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Mode

Threshold voltage levels.

Threshold voltage values used in the logic evaluation. See Digital Simulation for more information.

Output low

V

Output low voltage.

Maximum output voltage level to produce a low signal.

Input low threshold

V

Input low threshold voltage.

Maximum input voltage level for the signal to be considered low.

Input high threshold

V

Input high threshold voltage.

Minimum input voltage level for the signal to be considered high.

Output high

V

Output high voltage.

Minimum output voltage level to produce a high signal.

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