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FM 1V1kHz0°V1VinIO1PR1Vout1kΩR15nFC11nHL15V1kHz100HzV21IO10 V
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ID:

ID:

x10
x0.1
Sheet:1
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Details
Netlist
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SPICE
SPICE Netlist

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The * symbol indicates a comment.
The + symbol indicates a continuation from the previous line.
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** Radio Tuner Design (1) (1) **
*
* Multisim Live SPICE netlist
*
*

* --- Circuit Topology ---

* Component: C1
cC1 IO1 0 5e-9

* Component: L1
lL1 IO1 0 1e-9

* Component: R1
rR1 1 IO1 1000 VIRTUAL_RESISTANCE_R1

* Component: V1
vV1 1 0 dc 0 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 0 1 1000 0 0 0 )


* --- Circuit Models ---

* R1 model
.model VIRTUAL_RESISTANCE_R1 r( )


* --- Unconnected items ---
* These will be excluded
* from the simulation

* Component: V2
vV2 V2_NC_1 V2_NC_2 dc 0
+ sffm(0 5 1000 5 100)

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Radio Tuner Design (1) (1)
Schematic

The simulation to run. See Simulation types for more information.

Name

Start frequency

Hz

Stop frequency

Hz

Points per decade

Start simulation

Mode

Threshold voltage levels.

Threshold voltage values used in the logic evaluation. See Digital Simulation for more information.

Output low

V

Output low voltage.

Maximum output voltage level to produce a low signal.

Input low threshold

V

Input low threshold voltage.

Maximum input voltage level for the signal to be considered low.

Input high threshold

V

Input high threshold voltage.

Minimum input voltage level for the signal to be considered high.

Output high

V

Output high voltage.

Minimum output voltage level to produce a high signal.

Width

Sheet width in grid squares.

Height

Sheet height in grid squares.

Grid

Toggles grid display.

Net Labels

Toggles all net labels.

Component Labels

Toggles all component labels.