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500ΩRG10kΩR1R210kΩR310kΩR410kΩR510kΩV1V21324R610kΩ51.9V64kHz0°V1V21.9V65kHz0°V1V2SignalA15VV3V415VV+V-V+V-U6U7U86V+V-V+V-SignalBVout1Difference V V V
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ID:

ID:

x10
x0.1
Sheet:1
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SPICE
SPICE Netlist

This is a text-based representation of the circuit.
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Probes do not appear in netlists.

** 6 **
*
* Multisim Live SPICE netlist
*
*

* --- Circuit Topology ---

* Component: R1
rR1 1 3 10000 VIRTUAL_RESISTANCE_R1

* Component: R2
rR2 2 4 10000 VIRTUAL_RESISTANCE_R2

* Component: R3
rR3 4 5 10000 VIRTUAL_RESISTANCE_R3

* Component: R4
rR4 3 6 10000 VIRTUAL_RESISTANCE_R4

* Component: R5
rR5 6 Vout1 10000 VIRTUAL_RESISTANCE_R5

* Component: R6
rR6 5 0 10000 VIRTUAL_RESISTANCE_R6

* Component: RG
rRG 1 2 500 VIRTUAL_RESISTANCE_RG

* Component: U6
xU6 V1 1 V+ V- 3 5T_VIRTUAL_U6 PARAMS: VOS=0.001 IBS=8e-8 IOS=2e-8 AVOL=200000 BW=100000000 SR=1000000 CMRR=100 ISC=0.025 RI=10000000 RO=10

* Component: U7
xU7 V2 2 V+ V- 4 5T_VIRTUAL_U7 PARAMS: VOS=0.001 IBS=8e-8 IOS=2e-8 AVOL=200000 BW=100000000 SR=1000000 CMRR=100 ISC=0.025 RI=10000000 RO=10

* Component: U8
xU8 5 6 V+ V- Vout1 5T_VIRTUAL_U8 PARAMS: VOS=0.001 IBS=8e-8 IOS=2e-8 AVOL=200000 BW=100000000 SR=1000000 CMRR=100 ISC=0.025 RI=10000000 RO=10

* Component: V1
vV1 V1 0 dc 2.011 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 2.011 1.9 64000 0 0 0 )

* Component: V2
vV2 V2 0 dc 2.017 ac 1 0
+ distof1 0 0
+ distof2 0 0
+ sin ( 2.017 1.9 65000 0 0 0 )

* Component: V3
vV3 0 V- dc 15 ac 0 0
+ distof1 0 0
+ distof2 0 0

* Component: V4
vV4 V+ 0 dc 15 ac 0 0
+ distof1 0 0
+ distof2 0 0


* --- Circuit Models ---

* R1 model
.model VIRTUAL_RESISTANCE_R1 r( )

* R2 model
.model VIRTUAL_RESISTANCE_R2 r( )

* R3 model
.model VIRTUAL_RESISTANCE_R3 r( )

* R4 model
.model VIRTUAL_RESISTANCE_R4 r( )

* R5 model
.model VIRTUAL_RESISTANCE_R5 r( )

* R6 model
.model VIRTUAL_RESISTANCE_R6 r( )

* RG model
.model VIRTUAL_RESISTANCE_RG r( )


* --- Subcircuits ---

* U6 subcircuit
.subckt 5T_VIRTUAL_U6 In_p In_n Vpos Vneg Out params: AVOL=200k BW=20Meg CMRR=100
+SR=1Meg RO=75 ISC=25m RI=100meg VOS=0.1m IBS=1n IOS=1p
.param Rp1=1e6
.param Rs1=1e6
.param K_Is2a=sqrt(AVOL)/Rs1
.param K_Is2b=sqrt(AVOL)/Rp1
.param Cp1={AVOL/(2*pi*BW*Rp1)}
.param CMRR_lin=10**(CMRR/20)


Rin In_p In_n {RI}
Bcm 4 3 V = { V(cm)/CMRR_lin}
Voff In_p 4 {VOS}
Ibias1 In_p 0 {IBS}
Ibias2 In_n 0 {IBS}
Ioffset In_p In_n {IOS/2}

Rcm1 In_p cm 10meg
Rcm2 In_n cm 10meg

BIs1a vref vs2a I = { K_Is2a*(V(3)-V(In_n)) }
Rs1 vs2a vref {Rs1}

BIs2b vref vs2b I = { K_Is2b*(V(vs2a)-v(vref)) }
Rp1 vs2b vref {Rp1}
VCp1sense vs2b vs2b_ 0
Cp1 vs2b_ vref {Cp1}


D3 vs2b_ 8 Limit_Diode
D4 8 vpos Limit_Diode
B_SRp 8 vpos I={I(VCp1sense)- (Cp1*SR)}

D5 10 vs2b_ Limit_Diode
D6 Vneg 10 Limit_Diode
B_SRn Vneg 10 I={-1*I(VCp1sense)-(Cp1*SR)}

DVpclip vs2b_ Vpos V_limit
DVnclip Vneg vs2b_ V_limit

Bout vref out_ I={(V(vs2b)-v(vref))/RO}
Rout vref out_ {RO}
Voutsense out_ out 0

D9 out 15 Limit_Diode
D10 15 vpos Limit_Diode
B_outp 15 vpos I={I(Voutsense)- ISC}

D11 16 out Limit_Diode
D12 vneg 16 Limit_Diode
B_outn vneg 16 I={-1*I(Voutsense)-ISC}

R5 Vpos mid 1000000
R6 mid Vneg 1000000
Eref vref 0 mid 0 1

.MODEL Limit_Diode D (IS= 1.0e-12)
.MODEL V_limit D(n=0.1)
.ends

* U7 subcircuit
.subckt 5T_VIRTUAL_U7 In_p In_n Vpos Vneg Out params: AVOL=200k BW=20Meg CMRR=100
+SR=1Meg RO=75 ISC=25m RI=100meg VOS=0.1m IBS=1n IOS=1p
.param Rp1=1e6
.param Rs1=1e6
.param K_Is2a=sqrt(AVOL)/Rs1
.param K_Is2b=sqrt(AVOL)/Rp1
.param Cp1={AVOL/(2*pi*BW*Rp1)}
.param CMRR_lin=10**(CMRR/20)


Rin In_p In_n {RI}
Bcm 4 3 V = { V(cm)/CMRR_lin}
Voff In_p 4 {VOS}
Ibias1 In_p 0 {IBS}
Ibias2 In_n 0 {IBS}
Ioffset In_p In_n {IOS/2}

Rcm1 In_p cm 10meg
Rcm2 In_n cm 10meg

BIs1a vref vs2a I = { K_Is2a*(V(3)-V(In_n)) }
Rs1 vs2a vref {Rs1}

BIs2b vref vs2b I = { K_Is2b*(V(vs2a)-v(vref)) }
Rp1 vs2b vref {Rp1}
VCp1sense vs2b vs2b_ 0
Cp1 vs2b_ vref {Cp1}


D3 vs2b_ 8 Limit_Diode
D4 8 vpos Limit_Diode
B_SRp 8 vpos I={I(VCp1sense)- (Cp1*SR)}

D5 10 vs2b_ Limit_Diode
D6 Vneg 10 Limit_Diode
B_SRn Vneg 10 I={-1*I(VCp1sense)-(Cp1*SR)}

DVpclip vs2b_ Vpos V_limit
DVnclip Vneg vs2b_ V_limit

Bout vref out_ I={(V(vs2b)-v(vref))/RO}
Rout vref out_ {RO}
Voutsense out_ out 0

D9 out 15 Limit_Diode
D10 15 vpos Limit_Diode
B_outp 15 vpos I={I(Voutsense)- ISC}

D11 16 out Limit_Diode
D12 vneg 16 Limit_Diode
B_outn vneg 16 I={-1*I(Voutsense)-ISC}

R5 Vpos mid 1000000
R6 mid Vneg 1000000
Eref vref 0 mid 0 1

.MODEL Limit_Diode D (IS= 1.0e-12)
.MODEL V_limit D(n=0.1)
.ends

* U8 subcircuit
.subckt 5T_VIRTUAL_U8 In_p In_n Vpos Vneg Out params: AVOL=200k BW=20Meg CMRR=100
+SR=1Meg RO=75 ISC=25m RI=100meg VOS=0.1m IBS=1n IOS=1p
.param Rp1=1e6
.param Rs1=1e6
.param K_Is2a=sqrt(AVOL)/Rs1
.param K_Is2b=sqrt(AVOL)/Rp1
.param Cp1={AVOL/(2*pi*BW*Rp1)}
.param CMRR_lin=10**(CMRR/20)


Rin In_p In_n {RI}
Bcm 4 3 V = { V(cm)/CMRR_lin}
Voff In_p 4 {VOS}
Ibias1 In_p 0 {IBS}
Ibias2 In_n 0 {IBS}
Ioffset In_p In_n {IOS/2}

Rcm1 In_p cm 10meg
Rcm2 In_n cm 10meg

BIs1a vref vs2a I = { K_Is2a*(V(3)-V(In_n)) }
Rs1 vs2a vref {Rs1}

BIs2b vref vs2b I = { K_Is2b*(V(vs2a)-v(vref)) }
Rp1 vs2b vref {Rp1}
VCp1sense vs2b vs2b_ 0
Cp1 vs2b_ vref {Cp1}


D3 vs2b_ 8 Limit_Diode
D4 8 vpos Limit_Diode
B_SRp 8 vpos I={I(VCp1sense)- (Cp1*SR)}

D5 10 vs2b_ Limit_Diode
D6 Vneg 10 Limit_Diode
B_SRn Vneg 10 I={-1*I(VCp1sense)-(Cp1*SR)}

DVpclip vs2b_ Vpos V_limit
DVnclip Vneg vs2b_ V_limit

Bout vref out_ I={(V(vs2b)-v(vref))/RO}
Rout vref out_ {RO}
Voutsense out_ out 0

D9 out 15 Limit_Diode
D10 15 vpos Limit_Diode
B_outp 15 vpos I={I(Voutsense)- ISC}

D11 16 out Limit_Diode
D12 vneg 16 Limit_Diode
B_outn vneg 16 I={-1*I(Voutsense)-ISC}

R5 Vpos mid 1000000
R6 mid Vneg 1000000
Eref vref 0 mid 0 1

.MODEL Limit_Diode D (IS= 1.0e-12)
.MODEL V_limit D(n=0.1)
.ends

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Schematic

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Name

Start time

s

End time

s

Start simulation

Mode

Threshold voltage levels.

Threshold voltage values used in the logic evaluation. See Digital Simulation for more information.

Output low

V

Output low voltage.

Maximum output voltage level to produce a low signal.

Input low threshold

V

Input low threshold voltage.

Maximum input voltage level for the signal to be considered low.

Input high threshold

V

Input high threshold voltage.

Minimum input voltage level for the signal to be considered high.

Output high

V

Output high voltage.

Minimum output voltage level to produce a high signal.

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