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24.0VVdcS1S4S3S65V100HzVTa2V15V100HzS5S25V100HzVTa3VT35V100HzVT45V100Hz5V100HzVTa45V100HzVTa55V100HzVTa6VT25V100HzVT65V100HzT1T1T3T3T2T2T5T5T4T6T4T65VVT5V65V10ΩR1R210ΩR310ΩUF1UL12 +REF2 -REF1UF2UF3UL13 +REF1 -UL23 +REF3 -REF2REF3 V V V V V V V V V
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ID:

ID:

x10
x0.1
Sheet:1
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SPICE
SPICE Netlist

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The * symbol indicates a comment.
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Probes do not appear in netlists.

** Driefasige invertor (1) **
*
* Multisim Live SPICE netlist
*
*

* --- Circuit Topology ---

* Component: R1
rR1 9 0 10 VIRTUAL_RESISTANCE_R1

* Component: R2
rR2 14 0 10 VIRTUAL_RESISTANCE_R2

* Component: R3
rR3 8 0 10 VIRTUAL_RESISTANCE_R3

* Component: S1
xS1 1 9 T1 TRANSISTOR_DIODE_S1 PARAMS: CtrlOn=5 TranRon=0.001 TranRoff=1000000 TranVon=0 DiodeRon=0.01 DiodeRoff=1000000 DiodeVon=0

* Component: S2
xS2 8 12 T2 TRANSISTOR_DIODE_S2 PARAMS: CtrlOn=5 TranRon=0.001 TranRoff=1000000 TranVon=0 DiodeRon=0.01 DiodeRoff=1000000 DiodeVon=0

* Component: S3
xS3 1 14 T3 TRANSISTOR_DIODE_S3 PARAMS: CtrlOn=5 TranRon=0.001 TranRoff=1000000 TranVon=0 DiodeRon=0.01 DiodeRoff=1000000 DiodeVon=0

* Component: S4
xS4 9 12 T4 TRANSISTOR_DIODE_S4 PARAMS: CtrlOn=5 TranRon=0.001 TranRoff=1000000 TranVon=0 DiodeRon=0.01 DiodeRoff=1000000 DiodeVon=0

* Component: S5
xS5 1 8 T5 TRANSISTOR_DIODE_S5 PARAMS: CtrlOn=5 TranRon=0.001 TranRoff=1000000 TranVon=0 DiodeRon=0.01 DiodeRoff=1000000 DiodeVon=0

* Component: S6
xS6 14 12 T6 TRANSISTOR_DIODE_S6 PARAMS: CtrlOn=5 TranRon=0.001 TranRoff=1000000 TranVon=0 DiodeRon=0.01 DiodeRoff=1000000 DiodeVon=0

* Component: V1
vV1 T1 5
+ pulse( 0 5 0 1e-9 1e-9
+ { 33.333 * 0.01 / 100 }
+ { 1/100 } )

* Component: V6
vV6 6 7 dc 5 ac 0 0
+ distof1 0 0
+ distof2 0 0

* Component: VT2
vVT2 T2 4
+ pulse( 0 5 0 1e-9 1e-9
+ { 50 * 0.01 / 100 }
+ { 1/100 } )

* Component: VT3
vVT3 T3 2
+ pulse( 0 5 0 1e-9 1e-9
+ { 66.667 * 0.01 / 100 }
+ { 1/100 } )

* Component: VT4
vVT4 T4 10
+ pulse( 0 5 0 1e-9 1e-9
+ { 83.333 * 0.01 / 100 }
+ { 1/100 } )

* Component: VT5
vVT5 T5 3 dc 5 ac 0 0
+ distof1 0 0
+ distof2 0 0

* Component: VT6
vVT6 T6 6
+ pulse( 0 5 0 1e-9 1e-9
+ { 16.667 * 0.01 / 100 }
+ { 1/100 } )

* Component: VTa2
vVTa2 13 4
+ pulse( 0 5 0 1e-9 1e-9
+ { 16.667 * 0.01 / 100 }
+ { 1/100 } )

* Component: VTa3
vVTa3 5 2
+ pulse( 0 5 0 1e-9 1e-9
+ { 33.333 * 0.01 / 100 }
+ { 1/100 } )

* Component: VTa4
vVTa4 13 10
+ pulse( 0 5 0 1e-9 1e-9
+ { 50 * 0.01 / 100 }
+ { 1/100 } )

* Component: VTa5
vVTa5 5 3
+ pulse( 0 5 0 1e-9 1e-9
+ { 66.667 * 0.01 / 100 }
+ { 1/100 } )

* Component: VTa6
vVTa6 13 7
+ pulse( 0 5 0 1e-9 1e-9
+ { 83.333 * 0.01 / 100 }
+ { 1/100 } )

* Component: Vdc
vVdc 1 12 dc 24 ac 0 0
+ distof1 0 0
+ distof2 0 0


* --- Circuit Models ---

* R1 model
.model VIRTUAL_RESISTANCE_R1 r( )

* R2 model
.model VIRTUAL_RESISTANCE_R2 r( )

* R3 model
.model VIRTUAL_RESISTANCE_R3 r( )


* --- Subcircuits ---

* S1 subcircuit
.subckt TRANSISTOR_DIODE_S1 upper lower ctrlp params: CtrlOn=1 TranRon=1 TranRoff=1 TranVon=1 DiodeRon=1 DiodeRoff=1 DiodeVon=1

s1 upper lower_ ctrlp 0 sw1
.model sw1 vswitch(Ron={TranRon} Roff={TranRoff} Von={CtrlOn} Voff=0)

Von lower_ lower {TranVon}

ad1 %vd(lower upper) %id(lower upper) diode1
.model diode1 pwl(x_array=[{DiodeVon-1} {DiodeVon} {DiodeVon+1}] y_array=[{-1/DiodeRoff} 0 {1/DiodeRon}] fraction=false input_domain=0.0)

.ends

* S2 subcircuit
.subckt TRANSISTOR_DIODE_S2 upper lower ctrlp params: CtrlOn=1 TranRon=1 TranRoff=1 TranVon=1 DiodeRon=1 DiodeRoff=1 DiodeVon=1

s1 upper lower_ ctrlp 0 sw1
.model sw1 vswitch(Ron={TranRon} Roff={TranRoff} Von={CtrlOn} Voff=0)

Von lower_ lower {TranVon}

ad1 %vd(lower upper) %id(lower upper) diode1
.model diode1 pwl(x_array=[{DiodeVon-1} {DiodeVon} {DiodeVon+1}] y_array=[{-1/DiodeRoff} 0 {1/DiodeRon}] fraction=false input_domain=0.0)

.ends

* S3 subcircuit
.subckt TRANSISTOR_DIODE_S3 upper lower ctrlp params: CtrlOn=1 TranRon=1 TranRoff=1 TranVon=1 DiodeRon=1 DiodeRoff=1 DiodeVon=1

s1 upper lower_ ctrlp 0 sw1
.model sw1 vswitch(Ron={TranRon} Roff={TranRoff} Von={CtrlOn} Voff=0)

Von lower_ lower {TranVon}

ad1 %vd(lower upper) %id(lower upper) diode1
.model diode1 pwl(x_array=[{DiodeVon-1} {DiodeVon} {DiodeVon+1}] y_array=[{-1/DiodeRoff} 0 {1/DiodeRon}] fraction=false input_domain=0.0)

.ends

* S4 subcircuit
.subckt TRANSISTOR_DIODE_S4 upper lower ctrlp params: CtrlOn=1 TranRon=1 TranRoff=1 TranVon=1 DiodeRon=1 DiodeRoff=1 DiodeVon=1

s1 upper lower_ ctrlp 0 sw1
.model sw1 vswitch(Ron={TranRon} Roff={TranRoff} Von={CtrlOn} Voff=0)

Von lower_ lower {TranVon}

ad1 %vd(lower upper) %id(lower upper) diode1
.model diode1 pwl(x_array=[{DiodeVon-1} {DiodeVon} {DiodeVon+1}] y_array=[{-1/DiodeRoff} 0 {1/DiodeRon}] fraction=false input_domain=0.0)

.ends

* S5 subcircuit
.subckt TRANSISTOR_DIODE_S5 upper lower ctrlp params: CtrlOn=1 TranRon=1 TranRoff=1 TranVon=1 DiodeRon=1 DiodeRoff=1 DiodeVon=1

s1 upper lower_ ctrlp 0 sw1
.model sw1 vswitch(Ron={TranRon} Roff={TranRoff} Von={CtrlOn} Voff=0)

Von lower_ lower {TranVon}

ad1 %vd(lower upper) %id(lower upper) diode1
.model diode1 pwl(x_array=[{DiodeVon-1} {DiodeVon} {DiodeVon+1}] y_array=[{-1/DiodeRoff} 0 {1/DiodeRon}] fraction=false input_domain=0.0)

.ends

* S6 subcircuit
.subckt TRANSISTOR_DIODE_S6 upper lower ctrlp params: CtrlOn=1 TranRon=1 TranRoff=1 TranVon=1 DiodeRon=1 DiodeRoff=1 DiodeVon=1

s1 upper lower_ ctrlp 0 sw1
.model sw1 vswitch(Ron={TranRon} Roff={TranRoff} Von={CtrlOn} Voff=0)

Von lower_ lower {TranVon}

ad1 %vd(lower upper) %id(lower upper) diode1
.model diode1 pwl(x_array=[{DiodeVon-1} {DiodeVon} {DiodeVon+1}] y_array=[{-1/DiodeRoff} 0 {1/DiodeRon}] fraction=false input_domain=0.0)

.ends

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Driefasige invertor (1)
Schematic

The simulation to run. See Simulation types for more information.

Name

Title of graph. Edit as desired.

End time

s

Time at which the simulation stops. Does not include pauses. Simulation does not occur in real time.

Start simulation

Mode

Threshold voltage levels.

Threshold voltage values used in the logic evaluation. See Digital Simulation for more information.

Output low

V

Output low voltage.

Maximum output voltage level to produce a low signal.

Input low threshold

V

Input low threshold voltage.

Maximum input voltage level for the signal to be considered low.

Input high threshold

V

Input high threshold voltage.

Minimum input voltage level for the signal to be considered high.

Output high

V

Output high voltage.

Minimum output voltage level to produce a high signal.

Width

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Height

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