Full Adder Using 2-Input Gates

The circuit is a modification of the conventional full adder (refer to my circuit "Full Adder"). In this variant the desired logic functions are implemented using only two-input logic gates. The sum (SUMf) is generated using two cascaded two-input exclusive OR (XOR) gates. The carry output (CO) is obtained using a three-input majority voting logic. However, the three-input majority voting logic is now constructed using two-input AND and OR gates. CI = Carry Input AG = Augend AD = Addend SUMf = (Full adder) Sum COf = (Full adder) Carry Output