Design 2

Improvement from Design 1 - Added R1 and capacitor at B2 to allow DC voltage (otherwise transistor won't work) - Added C3 to also spit out ac output - Used UPenn Method to find Rc, R1, R2, and R3 based on chosen Ic of 1mA, beta of 100, V_A of 100V and desired Vo of 10V Problems: - Clearly, Vo is NOT 10 V - Ic is clearly NOT 1mA - Gain is less than 1