siddharths

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siddharths

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lab pratical 11 Perform DC analysisAssume transistor in saturation VG= ( 200 / 300 ) x 3 = 2 V Hence, KVL at GS Loop :VGS+ IDRS–VTH = 0 VGS =2 –3ID KVL at DS loopVDS+ 10 ID + 3ID –3 = 0 VDS= 3 -13 ID Assume biased in saturation mode: Id=Kn(Vgs-Vtn)^2 Hence, ID = 1.0 (2 –3ID -1 )^2 = 1.0 (1 –3ID )^2 9 ID2–7 ID+ 1 = 0 Vtn= 1V, Kn= 1.0 mA / V ID= 0.589 mAID= 0.19 mAVDS sat= VGS-VTN= 1.43 –1.0 = 0.43 V0.53 V > 0.43 VTransistor in saturationAssumption is correct! VGS= 2 –3ID= 0.233 < VT MOSFET is OFF KVDS= 3 -13 ID = 0.53 VNot OK

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sidd111222

11 Circuits

Date Created

2 years, 9 months ago

Last Modified

2 years, 9 months ago

Tags

  • dc analysis

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