Prueba de flip floop

0
Favorite
1
copy
Copy
149
Views
Prueba de flip floop

Circuit Description

Graph image for Prueba de flip floop

Circuit Graph

This 4-bit digital counter is a sequential circuit that uses JK flipflops, AND gates, and a digital clock. For each clock tick, the 4-bit output increments by one. After it reaches it's maximum value of 15 (calculated by 2^4-1), it resets to zero. Each probe measures one bit of the output, with PR1 measuring the least significant bit and PR4 measuring the most significant bit. PR5 is the clock. Expand this circuit by adding a digital to analog converter!

There are currently no comments

Profile image for Alfredo_ws

2bit adder and flip floop

Alfredo_ws

Creator

Alfredo_ws

4 Circuits

Date Created

11 months, 3 weeks ago

Last Modified

11 months, 3 weeks ago

Tags

  • digital
  • counter
  • 4-bit

Circuit Copied From