cmos nand

A two -input NAND gate consists of 2 ptype units in parallel and two ntype units are in series . If all the inputs are HIGH , both pchannel transistor OFF nad nchannel transistor gets ON.The output has a low impedance to ground and produces a LOW state .IF any input is LOW ,the assiociated n channel transistor is turned OFF and associated p channel turned ON.The output is coupled to VDD and goes to the HIGH state .