Ex 08 Voltage Divider Bias Amplifier

observation fixed rc,re,bita(b) 4 per each diff Vcc ,fix r1,r2 diff r1 ,fix Vcc,r2 diff r2 ,fix Vcc,r1 ib(mic A),ic(mA),Vce=Vcc-Ic(rc+re) ic=bita(b)*ib ib=Vth-Vbe/Rth+(b+1)Re vth=r2*Vcc/r1+r2 Rth=r1*r2/r1+r2 oltage Divider Bias Circuit, also known as emitter current bias, is the most stable of the three basic transistor bias circuits. A voltage divider bias circuit is shown in Fig. 5-22(a), and the current and voltage conditions throughout the circuit are illustrated in Fig. 5-22(b). It is seen that, as well as the collector resistor (RC), there is an emitter resistor (RE) connected in series with the transistor. As discussed already, the total dc load in series with the transistor is (RC + RE), and this total resistance must be used when drawing the dc load line for the circuit. Resistors R1 and R2 constitute a voltage divider that divides the supply voltage to produce the base bias voltage (VB). Voltage Divider Bias Circuit are normally designed to have the voltage divider current (I2) very much larger than the transistor base current (IB). In this circumstance, VB is largely unaffected by IB, so VB can be assumed to remain constant.