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This device is a simplified SCR (silicon-controlled rectifier) thyristor.
Its model is represented by the following:
When the gate voltage (relative to ground) is higher than the Trigger gate voltage (Vth), a digital high is seen by the inverter and the SR-latch. This sets the latch, which turns on switch S1, and allows current to flow through the SCR if the diode is forward biased. When the gate voltage drops below the Trigger gate voltage, the latch remains set if the SCR current is greater than the Holding current (IH).
The only path where current can flow within the entire model is through switch S1 and the diode.
No current flows anywhere else in the model including through the gate. The gate is designed to act more as an ideal control port than an electrical port with impedance. This SCR model is intended for system-level simulation where the importance of an SCR's basic triggering behavior dominates all other behavior.
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